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Module xhci

Module xhci 

Source

Structsยง

CapRegisters ๐Ÿ”’
DeviceSlot ๐Ÿ”’
EndpointContext ๐Ÿ”’
InputContext ๐Ÿ”’
InputControlContext ๐Ÿ”’
InterrupterRegisters ๐Ÿ”’
OpRegisters ๐Ÿ”’
RuntimeRegisters ๐Ÿ”’
SlotContext ๐Ÿ”’
Trb ๐Ÿ”’
XhciController
XhciPort ๐Ÿ”’

Constantsยง

EP_TYPE_CONTROL ๐Ÿ”’
EP_TYPE_INTR_IN ๐Ÿ”’
MAX_ENDPOINTS ๐Ÿ”’
PORTSC_CCS ๐Ÿ”’
PORTSC_PED ๐Ÿ”’
PORTSC_PP ๐Ÿ”’
PORTSC_PR ๐Ÿ”’
PORTSC_SPEED_SHIFT ๐Ÿ”’
PORTSC_W1C_MASK ๐Ÿ”’
TRB_CYCLE ๐Ÿ”’
TRB_DIR_IN ๐Ÿ”’
TRB_DIR_OUT ๐Ÿ”’
TRB_IDT ๐Ÿ”’
TRB_IOC ๐Ÿ”’
TRB_TC ๐Ÿ”’
TRB_TD_SIZE_MASK ๐Ÿ”’
TRB_TD_SIZE_SHIFT ๐Ÿ”’
TRB_TYPE_ADDRESS_DEVICE ๐Ÿ”’
TRB_TYPE_CONFIGURE_ENDPOINT ๐Ÿ”’
TRB_TYPE_DATA_STAGE ๐Ÿ”’
TRB_TYPE_ENABLE_SLOT ๐Ÿ”’
TRB_TYPE_LINK ๐Ÿ”’
TRB_TYPE_NORMAL ๐Ÿ”’
TRB_TYPE_SETUP_STAGE ๐Ÿ”’
TRB_TYPE_SHIFT ๐Ÿ”’
TRB_TYPE_STATUS_STAGE ๐Ÿ”’
TRB_TYPE_TRANSFER_EVENT ๐Ÿ”’
USBCMD_HCRST ๐Ÿ”’
USBCMD_INTE ๐Ÿ”’
USBCMD_RUN_STOP ๐Ÿ”’
USBSTS_CNR ๐Ÿ”’
USBSTS_HCH ๐Ÿ”’
XHCI_MMIO_SIZE ๐Ÿ”’
XHCI_PORT_REG_BASE ๐Ÿ”’
XHCI_PORT_REG_STRIDE ๐Ÿ”’
XHCI_RING_TRBS ๐Ÿ”’

Staticsยง

XHCI_CONTROLLERS ๐Ÿ”’
XHCI_INITIALIZED ๐Ÿ”’
XHCI_IRQ_LINE

Functionsยง

TRB_GET_TYPE ๐Ÿ”’
get_controller
handle_interrupt
init
is_available