Expand description
PCI Configuration Space Access
Provides functions to scan the PCI bus and read/write configuration registers. Used to discover VirtIO and other PCI devices.
Reference: PCI Local Bus Specification 3.0
ModulesΒ§
- aer_cap
- AER (Advanced Error Reporting) capability register offsets.
- cap_id
- PCI capability IDs
- class
- PCI base class codes
- command
- PCI command register bits
- config
- PCI configuration register offsets
- device
- PCI Device IDs (VirtIO legacy)
- ext_
cap_ id - PCIe Extended Capability IDs (offset >= 0x100)
- intel_
eth - Intel Ethernet device IDs
- msi_cap
- Offsets within an MSI capability block (relative to capability base).
- msi_
ctrl - MSI control register bit definitions (16-bit at cap_base + 2).
- msix_
cap - Offsets within an MSI-X capability block (relative to capability base).
- msix_
ctrl - MSI-X control register bit definitions (16-bit at cap_base + 2).
- net_
subclass - PCI subclasses for network controllers
- sata_
progif - Programming interface codes for mass-storage SATA controllers
- sriov_
cap - SR-IOV capability register offsets (relative to capability base).
- sriov_
ctrl - SR-IOV Control register bits
- sriov_
status - SR-IOV Status register bits
- storage_
subclass - PCI subclasses for mass storage controllers
- vendor
- PCI Vendor IDs
StructsΒ§
- AerInfo
- AER (Advanced Error Reporting) capability information.
- Ecam
Region π - A mapped ECAM region covering a range of buses.
- PciAddress
- A PCI device location
- PciDevice
- PCI device information
- PciLine
Quirk π - PciScanner
- Iterator for scanning PCI bus
- Probe
Criteria - Full PCI probe criteria.
- Sriov
Info - SR-IOV capability information.
EnumsΒ§
- Bar
- Base Address Register (BAR) types
ConstantsΒ§
- CONFIG_
ADDRESS π - PCI Configuration Address Port
- CONFIG_
DATA π - PCI Configuration Data Port
- MSI_
ADDR_ BASE - x86 MSI message address (delivers to LAPIC via system bus).
- MSI_
ADDR_ DEST_ SHIFT - PCI_
IRQ_ πLINE_ ZERO_ IF_ FF
StaticsΒ§
- ECAM_
REGIONS π - Cached ECAM MMIO regions for extended config space access (offsets >= 0x100).
Populated during
scan_ecam_devices()when an MCFG table is present. - PCI_
DEVICE_ πCACHE - Cached PCI device inventory.
- PCI_
IO_ πLOCK - Global lock for PCI configuration space I/O.
FunctionsΒ§
- all_
devices - Return a snapshot of all discovered PCI devices.
- class_
name π - Human-readable PCI class name.
- device_
name π - Known PCI device names for human-readable logging.
- ecam_
read8 π β - Read a single byte from ECAM config space.
- ecam_
read32 π β - Read a 32-bit register from an ECAM-mapped PCI config space.
- ecam_
write32 π β - Write a 32-bit register to an ECAM-mapped PCI config space.
- find_
device - Helper to find a device by vendor and device ID
- find_
devices_ by_ class - Return all devices matching a PCI class/subclass pair.
- find_
devices_ by_ vendor - Return all devices for a given vendor from the cached PCI inventory.
- find_
ext_ capability - Find the PCIe extended capability offset for a given capability ID.
- find_
virtio_ device - Find a specific VirtIO device by device ID
- find_
virtio_ devices - Find all VirtIO devices on the PCI bus
- invalidate_
cache - Invalidate PCI cache.
- is_
absent_ πvendor - is_
ghost_ πdevice - probe_
all - Return all devices matching
criteria. - probe_
device_ πfull - Probe a PCI address using 4 batched dword reads under a single lock hold.
- probe_
ecam_ πdevice - Probe a single PCI device via ECAM MMIO.
- probe_
first - Return the first device matching
criteria. - probe_
from_ πword00 - Build a PciDevice when
word00(vendor+device dword) was already read by the callerβs fast-path vendor check, avoiding a redundant I/O cycle. - quirk_
zero_ πirq_ line - raw_
config_ πread - Single dword config read without building a PciDevice/PciAddress. Acquires PCI_IO_LOCK once.
- raw_
config_ πread_ u8 - Read a single byte from config space (derived from a dword read).
- read_
aer_ info - Read AER (Advanced Error Reporting) capability information.
- read_
sriov_ info - Read SR-IOV capability information from a PCI device.
- scan_
ecam_ πdevices - Scan PCI devices via ECAM (Memory-Mapped Configuration).
- valid_
header_ πtype - walk_
ext_ capabilities - Walk PCIe extended capabilities starting from
cap_ptr(>= 0x100). - with_
cache π - Populate the cache if empty, then run
fon the device slice.