Module ahci 

AHCI (Advanced Host Controller Interface) driver — AHCI spec 1.3.1

PCI: class=0x01 (Mass Storage), subclass=0x06 (SATA), prog_if=0x01 MMIO base: BAR5 (ABAR)

Per-port memory layout (packed into one 4 KB page): [0x000..0x3FF] Command List (1024 B, 32 × 32-byte headers) [0x400..0x4FF] FIS receive (256 B) [0x500..0x5FF] Command table (128 B header + 1 × 16-byte PRDT)

IRQ-driven completion (DRV-02 v2)

When a task context exists (current_task_id() is Some), commands are completed via interrupt + WaitQueue::wait_until() so the issuing task blocks without busy-spinning. During early boot (no task yet) the legacy polling path is used as a fallback.

Per-port statics (indexed by port_num 0..32) are used so the IRQ handler can signal completion without acquiring any slow lock:

• PORT_VIRT[n] — MMIO virtual address of port n registers
• PORT_SLOT0_DONE[n] — set by IRQ handler when slot-0 completes
• PORT_SLOT0_ERROR[n]— set by IRQ handler when a task-file error fires
• PORT_WQ[n] — WaitQueue; issuing task blocks here

Re-exports

pub use super::virtio_block::BlockDevice;

pub use super::virtio_block::BlockError;

pub use super::virtio_block::SECTOR_SIZE;

Structs

AhciController

Enums

AhciError

Statics

AHCI_IRQ_LINE

PCI interrupt line used by this controller.

Functions

get_device

Return a reference to the first usable AHCI controller, if any.

handle_interrupt

Called from the IDT AHCI IRQ handler.

init

Scan the PCI bus for an AHCI controller and initialise it.