Expand description
SIMD pixel operations for x86_64.
Currently exposes the SSE2 (+SSSE3 convert) implementations only.
AVX2/AVX512 variants are TEMPORARILY removed: nightly
1.100.0-nightly (c656540d, LLVM 23.1-rust) mis-compiles the custom
x86_64-unknown-none target by emitting +soft-float into every
function’s target-features, which makes X86 instruction selection abort
on 256-bit intrinsics (llvm.x86.avx2.pshuf.b) with:
“Do not know how to split the result of this operator!”
Restore avx2/avx512 once the toolchain issue is resolved. The
streaming-store paths are disabled too; cached SSE2 remains available.